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vishay siliconix si7980dp document number: 68391 s13-0631-rev. d, 25-mar-13 www.vishay.com 1 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: pmostechsupport@vishay.com dual n-channel 20 v (d-s) mo sfet with schottky diode features ? trenchfet ? power mosfet ?100 % r g and uis tested ? material categorization: for definitions of compliance please see www.vishay.com/doc?99912 applications ? synchronous buck converter - game machines - notebook computers notes: a. based on t c = 25 c. b. surface mounted on 1" x 1" fr4 board. c. t = 10 s. d. see solder profile ( www.vishay.com/doc?73257 ). the powerpak so-8 is a leadless package. t he end of the lead terminal is exposed copper (not plated) as a result of the singulat ion process in manufacturing. a solder fi llet at the exposed c opper tip cannot be guara nteed and is not required to ensure adequate bottom side solder interconnection. e. rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. package limited. product summary v ds r ds(on) ( ? ) i d (a) a, f q g (typ.) channel-1 20 0.022 at v gs = 10 v 8 8 0.025 at v gs = 4.5 v 8 channel-2 20 0.015 at v gs = 10 v 8 17 0.019 at v gs = 4.5 v 8 schottky product summary v ds (v) v sd (v) diode forward voltage i f (a) a 20 0.43 v at 1 a 4 ordering information: 1 2 3 4 5 6 7 8 s 1 /d 2 g 1 s 2 g 2 d 1 d 1 s 1 /d 2 s 1 /d 2 6.15 mm 5.15 mm bottom view powerpak so-8 si7980dp-t1-ge3 (lead (pb)-free and halogen-free) d 1 g 2 s 2 n-channel 2 mosfet schottky diode g 1 n-channel 1 mosfet s 1 /d 2 absolute maximum ratings (t a = 25 c, unless otherwise noted) parameter symbol channel-1 channel-2 unit drain-source voltage v ds 20 20 v gate-source voltage v gs 16 16 continuous drain current (t j = 150 c) t c = 25 c i d 8 f 8 f a t c = 70 c 8 f 8 f t a = 25 c 8.8 b, c 11 b, c t a = 70 c 7.1 b, c 9 b, c pulsed drain current i dm 30 30 source-drain current diode current t c = 25 c i s 8 f 8 f t a = 25 c 2.8 b, c 2.8 b, c pulsed source-drain current i sm 30 30 single pulse avalanche current l = 0.1 mh i as 15 15 single pulse avalanche energy e as 11.2 11.2 mj maximum power dissipation t c = 25 c p d 19.8 21.9 w t c = 70 c 12.6 14 t a = 25 c 3.1 b, c 3.4 b, c t a = 70 c 2 b, c 2.2 b, c operating junction and storage temperature range t j , t stg - 55 to 150 c soldering recommendations (peak temperature) d, e 260
vishay siliconix si7980dp www.vishay.com 2 document number: 68391 s13-0631-rev. d, 25-mar-13 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: pmostechsupport@vishay.com notes: a. surface mounted on 1" x 1" fr4 board. b. maximum under steady state conditions is 88 c/w (channel-1) and 83 c/w (channel-2). c. guaranteed by design, not subject to production testing. d. pulse test; pulse width ? 300 s, duty cycle ? 2 %. thermal resistance ratings parameter symbol channel-1 channel-2 unit typ. max. typ. max. maximum junction-to-ambient a, b t ? 10 s r thja 32 40 30 36 c/w maximum junction-to-case (drain) steady state r thjc 5 6.3 4.5 5.7 specifications (t j = 25 c, unless otherwise noted) parameter symbol test conditions min. typ. c max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = 250 a ch-1 20 v v gs = 0 v, i d = 1 ma ch-2 20 v ds temperature coefficient ? v ds /t j i d = 250 a ch-1 22 mv/c v gs(th) temperature coefficient ? v gs(th) /t j i d = 250 a ch-1 - 5 gate threshold voltage v gs(th) v ds = v gs , i d = 250 a ch-1 1 2.5 v v ds = v gs , i d = 1 ma ch-2 1.4 2.8 gate-body leakage i gss v ds = 0 v, v gs = 16 v ch-1 100 na v ds = 0 v, v gs = 16 v ch-2 100 zero gate voltage drain current i dss v ds = 20 v, v gs = 0 v ch-1 0.001 ma v ds = 20 v, v gs = 0 v ch-2 0.05 0.50 v ds = 20 v, v gs = 0 v, t j = 100 c ch-1 0.025 v ds = 20 v, v gs = 0 v, t j = 100 c ch-2 3 15 on-state drain current d i d(on) v ds = ? 5 v, v gs = 10 v ch-1 10 a v ds = ? 5 v, v gs = 10 v ch-2 10 drain-source on-state resistance d r ds(on) v gs = 10 v, i d = 5 a ch-1 0.018 0.022 ? v gs = 10 v, i d = 5 a ch-2 0.012 0.015 v gs = 4.5 v, i d = 4 a ch-1 0.020 0.025 v gs = 4.5 v, i d = 4 a ch-2 0.015 0.019 forward transconductance d g fs v ds = 15 v, i d = 5 a ch-1 40 s v ds = 15 v, i d = 5 a ch-2 47 dynamic c input capacitance c iss channel-1 v ds = 10 v, v gs = 0 v, f = 1 mhz channel-2 v ds = 10 v, v gs = 0 v, f = 1 mhz ch-1 1010 pf ch-2 1370 output capacitance c oss ch-1 220 ch-2 320 reverse transfer capacitance c rss ch-1 100 ch-2 120
vishay siliconix si7980dp document number: 68391 s13-0631-rev. d, 25-mar-13 www.vishay.com 3 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: pmostechsupport@vishay.com note: a. guaranteed by design, not subject to production testing. stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indi cated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended per iods may affect device reliability. specifications (t j = 25 c, unless otherwise noted) parameter symbol test conditions min. typ. a max. unit dynamic a total gate charge q g v ds = 10 v, v gs = 10 v, i d = 5 a ch-1 17.5 27 nc v ds = 10 v, v gs = 10 v, i d = 5 a ch-2 22.5 34 channel-1 v ds = 10 v, v gs = 4.5 v, i d = 5 a channel-2 v ds = 10 v, v gs = 4.5 v, i d = 5 a ch-1 8 12 ch-2 10.3 16 gate-source charge q gs ch-1 2.5 ch-2 3.4 gate-drain charge q gd ch-1 2.1 ch-2 2.6 gate resistance r g f = 1 mhz ch-1 0.2 1.1 2.2 ? ch-2 0.2 1.3 2.6 tu r n - o n d e l ay t i m e t d(on) channel-1 v dd = 10 v, r l = 2 ? i d ? 5 a, v gen = 10 v, r g = 1 ? channel-2 v dd = 10 v, r l = 2 ? i d ? 5 a, v gen = 10 v, r g = 1 ? ch-1 9 18 ns ch-2 13 25 rise time t r ch-1 16 30 ch-2 16 30 turn-off delay time t d(off) ch-1 20 35 ch-2 24 45 fall time t f ch-1 9 18 ch-2 8 16 tu r n - o n d e l ay t i m e t d(on) channel-1 v dd = 10 v, r l = 2 ? i d ? 5 a, v gen = 4.5 v, r g = 1 ? channel-2 v dd = 10 v, r l = 2 ? i d ? 5 a, v gen = 4.5 v, r g = 1 ? ch-1 15 30 ch-2 18 35 rise time t r ch-1 18 35 ch-2 18 35 turn-off delay time t d(off) ch-1 20 40 ch-2 25 45 fall time t f ch-1 12 24 ch-2 10 20 drain-source body diode characteristics continuous source-drain diode current i s t c = 25 c ch-1 8 a ch-2 8 pulse diode forward current a i sm ch-1 30 ch-2 30 body diode voltage v sd i s = 2 a ch-1 0.73 1.1 v i s = 1 a ch-2 0.37 0.43 body diode reverse recovery time t rr channel-1 i f = 5 a, di/dt = 100 a/s, t j = 25 c channel-2 i f = 5 a, di/dt = 100 a/s, t j = 25 c ch-1 16 32 ns ch-2 20 40 body diode reverse recovery charge q rr ch-1 8 16 nc ch-2 10 20 reverse recovery fall time t a ch-1 8 ns ch-2 9 reverse recovery rise time t b ch-1 8 ch-2 11
vishay siliconix si7980dp www.vishay.com 4 document number: 68391 s13-0631-rev. d, 25-mar-13 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: pmostechsupport@vishay.com channel-1 typical characteristics (25 c, unless otherwise noted) output characteristics on-resistance vs. drain current gate charge 0 6 12 1 8 24 30 0.0 0.5 1.0 1.5 2.0 2.5 v ds - drain-to-so u rce v oltage ( v ) i d - drain c u rrent (a) v gs =10thr u 4 v v gs =3 v 0.016 0.01 8 0.020 0.022 0.024 0.026 0 6 12 1 8 24 30 r ds(on) - on-resistance ( ) i d - drain c u rrent (a) v gs = 10 v v gs = 4.5 v 0 2 4 6 8 10 04 8 12 16 20 i d = 5 a v gs - gate-to-so u rce v oltage ( v ) q g - totalgatecharge(nc) v ds = 15 v v ds = 10 v v ds = 5 v transfer characteristics capacitance on-resistance vs. junction temperature 0 1 2 3 4 5 012345 v gs - gate-to-so u rce v oltage ( v ) i d - drain c u rrent (a) t c = 25 c t c = 125 c t c = - 55 c c rss 0 260 520 7 8 0 1040 1300 04 8 12 16 20 c iss v ds - drain-to-so u rce v oltage ( v ) c - capacitance (pf) c oss 0.7 0.9 1.1 1.3 1.5 1.7 - 50 - 25 0 25 50 75 100 125 150 t j - j u nction temperat u re (c) ( n ormalized) r ds(on) - on-resistance v gs =10 v i d = 5 a v gs =4.5 v
vishay siliconix si7980dp document number: 68391 s13-0631-rev. d, 25-mar-13 www.vishay.com 5 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: pmostechsupport@vishay.com channel-1 typical characteristics (25 c, unless otherwise noted) source-drain diode forward voltage threshold voltage 0.0 0.2 0.4 0.6 0. 8 1.0 1.2 v sd - so u rce-to-drain v oltage( v ) i s - so u rcec u rrent (a) 1 0.01 0.001 0.1 10 100 t j = 25 c t j = 150 c - 0 . 8 - 0.6 - 0.4 - 0.2 0.0 0.2 0.4 - 50 - 25 0 25 50 75 100 125 150 i d = 250 ma v ariance ( v ) v gs(th) t j - temperat u re (c) i d =5ma on-resistance vs. gate-to-source voltage single pulse power, junction-to-ambient 0.000 0.012 0.024 0.036 0.04 8 0.060 0246 8 10 r ds(on) - on-resistance ( ) v gs - gate-to-so u rce v oltage ( v ) t j = 25 c t j = 125 c i d =5a 0 12 24 36 4 8 60 0 1 1 1 0 0 . 0 0.01 time (s) po w er ( w ) 0.1 safe operating area, junction-to-ambient v ds - drain-to-so u rce v oltage ( v ) * v gs > minim u m v gs at w hich r ds(on) is specified 100 1 0.1 1 10 100 0.01 10 i d - drain c u rrent (a) 0.1 t a = 25 c single p u lse 10 ms 100 ms 1s 10 s dc limited b yr ds(on) * b v dss limited 1ms
vishay siliconix si7980dp www.vishay.com 6 document number: 68391 s13-0631-rev. d, 25-mar-13 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: pmostechsupport@vishay.com channel-1 typical characteristics (25 c, unless otherwise noted) * the power dissipation p d is based on t j(max.) = 150 c, using junction-to-case thermal resistanc e, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. it is used to determine the current rating, when this rating falls below the package limit. current derating* 0 5 10 15 20 25 0 25 50 75 100 125 150 t c - case temperat u re (c) i d - drain c u rrent (a) package limited power derating, junction-to-case 0 5 10 15 20 25 0 25 50 75 100 125 150 t c - case temperat u re (c) po w er ( w ) power derating, junction-to-ambient 0.0 0.4 0. 8 1.2 1.6 2.0 0 25 50 75 100 125 150 t a - am b ient temperat u re (c) po w er ( w )
vishay siliconix si7980dp document number: 68391 s13-0631-rev. d, 25-mar-13 www.vishay.com 7 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: pmostechsupport@vishay.com channel-1 typical characteristics (25 c, unless otherwise noted) normalized thermal transient impedance, junction-to-ambient 10 -3 10 -2 1 10 1000 10 -1 10 -4 100 0.2 0.1 0.05 s qu are w a v ep u lse d u ration (s) n ormalized effecti v e transient thermal impedance 0.1 0.01 single p u lse t 1 t 2 n otes: p dm 1. d u ty cycle, d = 2. per unit base = r thja = 88 c/ w 3. t jm -t a =p dm z thja (t) t 1 t 2 4. s u rface mo u nted d u ty cycle = 0.5 0.02 1 normalized thermal transient impedance, junction-to-case 10 -4 10 -3 1 10 10 -2 10 -5 0.2 0.1 d u ty cycle = 0.5 s qu are w a v ep u lse d u ration (s) n ormalized effecti v e transient thermal impedance 1 0.1 0.01 single p u lse 0.02 0.05 -1
vishay siliconix si7980dp www.vishay.com 8 document number: 68391 s13-0631-rev. d, 25-mar-13 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: pmostechsupport@vishay.com channel-2 typical characteristics (25 c, unless otherwise noted) output characteristics on-resistance vs. drain current gate charge 0 6 12 1 8 24 30 0.0 0.6 1.2 1. 8 2.4 3.0 v ds - drain-to-so u rce v oltage ( v ) i d - drain c u rrent (a) v gs =10thr u 4 v v gs =3 v 0.010 0.012 0.014 0.016 0.01 8 0.020 0 6 12 1 8 24 30 r ds(on) - on-resistance ( ) i d - drainc u rrent(a) v gs =10 v v gs =4.5 v 0 2 4 6 8 10 0 5 10 15 20 25 i d =5a v gs - gate-to-so u rce v oltage ( v ) q g - total gate charge (nc) v ds =15 v v ds =10 v v ds =5 v transfer characteristics capacitance on-resistance vs. junction temperature 0 1 2 3 4 5 012345 v gs - gate-to-so u rce v oltage( v ) i d - drain c u rrent (a) t c =25 c t c = 125 c t c = - 55 c c rss 0 340 6 8 0 1020 1360 1700 04 8 12 16 20 c iss v ds - drain-to-so u rce v oltage ( v ) c - capacitance (pf) c oss 0.7 0.9 1.1 1.3 1.5 1.7 - 50 - 25 0 25 50 75 100 125 150 t j - j u nctiontemperat u re(c) ( n ormalized) r ds(on) - on-resistance v gs =10 v i d =5 a v gs =4.5 v
vishay siliconix si7980dp document number: 68391 s13-0631-rev. d, 25-mar-13 www.vishay.com 9 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: pmostechsupport@vishay.com channel-2 typical characteristics (25 c, unless otherwise noted) source-drain diode forward voltage reverse current (schottky) 0.1 1 10 100 0.0 0.2 0.4 0.6 0. 8 1.0 1.2 t j = 150 c v sd -so u rce-to-drain v oltage ( v ) - so u rce c u rrent (a) i s t j = 25 c 0 25 50 75 100 125 150 t j -j u nction temperat u re (c) -re v erse c u rrent (a) i r 10 -3 10 -5 10 -6 10 -4 10 -2 10 -1 v ds =15 v v ds =10 v v ds =20 v on-resistance vs. gate-to-source voltage single pulse power, junction-to-ambient 0.00 0.02 0.04 0.06 0.0 8 0.10 0246 8 10 r ds(on) - on-resistance ( ) v gs - gate-to-so u rce v oltage ( v ) t j = 25 c t j = 125 c i d =5a 0 14 2 8 42 56 70 0 1 1 1 0 0 . 0 0.01 time (s) po w er ( w ) 0.1 safe operating area, junction-to-ambient v ds - drain-to-so u rce v oltage ( v ) * v gs > minim u m v gs at w hich r ds(on) is specified 100 1 0.1 1 10 100 0.01 10 - drain c u rrent (a) i d 0.1 t a = 25 c single p u lse 10 ms 100 ms 1s 10 s dc limited b yr ds(on) * b v dss limited 1ms
vishay siliconix si7980dp www.vishay.com 10 document number: 68391 s13-0631-rev. d, 25-mar-13 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: pmostechsupport@vishay.com channel-2 typical characteristics (25 c, unless otherwise noted) * the power dissipation p d is based on t j(max.) = 150 c, using junction-to-case thermal resistanc e, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. it is used to determine the current rating, when this rating falls below the package limit. current derating* 0 6 13 19 26 32 0 25 50 75 100 125 150 t c - case temperat u re (c) i d - drain c u rrent (a) package limited power derating, junction-to-case 0.0 5.4 10. 8 16.2 21.6 27.0 0 25 50 75 100 125 150 t c - case temperat u re (c) po w er ( w ) power derating, junction-to-ambient 0.0 0.4 0. 8 1.2 1.6 2.0 0 25 50 75 100 125 150 t a -am b ient temperat u re (c) po w er ( w )
vishay siliconix si7980dp document number: 68391 s13-0631-rev. d, 25-mar-13 www.vishay.com 11 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: pmostechsupport@vishay.com channel-2 typical characteristics (25 c, unless otherwise noted) vishay siliconix maintains worldwide manufacturing capability. pr oducts may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?68391 . normalized thermal transient impedance, junction-to-ambient 10 -3 10 -2 1 10 1000 10 -1 10 -4 100 0.2 0.1 0.05 s qu are w a v ep u lse d u ration (s) n ormalized effecti v e transient thermal impedance 1 0.1 0.01 single p u lse t 1 t 2 n otes: p dm 1. d u ty cycle, d = 2. per unit base = r thja = 8 3c/ w 3. t jm -t a =p dm z thja (t) t 1 t 2 4. s u rface mo u nted d u ty cycle = 0.5 0.02 normalized thermal transient impedance, junction-to-case 10 -4 10 -3 1 10 10 -2 10 -5 0.2 0.1 d u ty cycle = 0.5 s qu are w a v ep u lse d u ration (s) n ormalized effecti v e transient thermal impedance 1 0.1 0.01 single p u lse 0.02 0.05 -1
package information www.vishay.com vishay siliconix revison: 20-may-13 1 document number: 71655 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 powerpak ? so-8, (single/dual) millimeters inches dim. min. nom. max. min. nom. max. a 0.97 1.04 1.12 0.038 0.041 0.044 a1 - 0.05 0 - 0.002 b 0.33 0.41 0.51 0.013 0.016 0.020 c 0.23 0.28 0.33 0.009 0.011 0.013 d 5.05 5.15 5.26 0.199 0.203 0.207 d1 4.80 4.90 5.00 0.189 0.193 0.197 d2 3.56 3.76 3.91 0.140 0.148 0.154 d3 1.32 1.50 1.68 0.052 0.059 0.066 d4 0.57 typ. 0.0225 typ. d5 3.98 typ. 0.157 typ. e 6.05 6.15 6.25 0.238 0.242 0.246 e1 5.79 5.89 5.99 0.228 0.232 0.236 e2 (for al product) 3.30 3.48 3.66 0.130 0.137 0.144 e2 (for other product) 3.48 3.66 3.84 0.137 0.144 0.151 e3 3.68 3.78 3.91 0.145 0.149 0.154 e4 (for al product) 0.58 typ. 0.023 typ. e4 (for other prod uct) 0.75 typ. 0.030 typ. e 1.27 bsc 0.050 bsc k (for al product) 1.45 typ. 0.057 typ. k (for other produc t) 1.27 typ. 0.050 typ. k1 0.56 - - 0.022 - - h 0.51 0.61 0.71 0.020 0.024 0.028 l 0.51 0.61 0.71 0.020 0.024 0.028 l1 0.06 0.13 0.20 0.002 0.005 0.008 ? 0 - 12 0 - 12 w 0.15 0.25 0.36 0.006 0.010 0.014 m 0.125 typ. 0.005 typ. ecn: c13-0702-rev. k, 20-may-13 dwg: 5881 3. dimensions exclusive of mold flash and cutting burrs. 1. notes 2 inch will govern. dimensions exclusive of mold gate burrs. backside view of single pad backside view of dual pad detail z d d1 d2 c a e1 d1 e2 d2 e b 1 2 3 4 h 4 3 2 1 1 2 3 4 b l d2 d3 (2x) z a1 k1 k d e w l1 d5 e3 d4 e4 e4 k l h e2 d4 d5 m e3 2 2
application note 826 vishay siliconix www.vishay.com document number: 72600 16 revision: 21-jan-08 application note recommended minimum pads for powerpak ? so-8 dual 0.174 (4.42) recommended mi nimum pads dimensions in inches/(mm) 0.260 (6.61) 0.024 (0.61) 0.065 (1.65) 0.150 (3.81) 0.050 (1.27) 0.050 (1.27) 0.032 (0.82) 0.040 (1.02) 0.026 (0.66) 0.154 (3.91) 0.065 (1.65) 0.024 (0.61) return to index return to index
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